Packet classification is the core component of routers, firewalls and  other networking devices that enables many networking services such as  packet filtering and traffic accounting. Using Ternary Content  Addressable Memories (TCAMs) to perform high-speed packet classification  has become the standard in industry today. While we can expect some  gain in TCAM performance from improved hardware, the demands on TCAM  performance (measured by the number of rules in packet classifiers)  increase far more rapidly due to the explosive growth of internet  services and threats. Hardware Based Packet Classification for High  Speed Internet Routers presents the most recent developments in hardware  based packet classification algorithms and architectures. This book  describes five methods which reduce the space that classifiers occupy  within TCAMs; TCAM Razor, All-Match Redundancy Removal, Bit Weaving,  Sequential Decomposition, and Topological Transformations. These methods  demonstrate that in most cases a substantial reduction of space is  achieved. Case studies and examples are provided throughout this book.  About this book: • Presents the only book in the market that exclusively  covers hardware based packet classification algorithms and  architectures. • Describes five methods which reduce the space that  classifiers occupy within TCAMs: TCAM Razor, All-Match Redundancy  Removal, Bit Weaving, Sequential Decomposition, and Topological  Transformations. • Provides case studies and examples throughout.  Hardware Based Packet Classification for High Speed Internet Routers is  designed for professionals and researchers who work within the related  field of router design. Advanced-level students concentrating on  computer science and electrical engineering will also find this book  valuable as a text or reference book.
Hardware Based Packet Classification for High Speed Internet Routers
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Labels: Hardware